Książka ASIC Design and Synthesis Vaibbhav Taraate

ASIC Design and Synthesis

Język: Angielski
Oprawa: Twarda
Dostępność: Dostępna u dostawcy
Wysyłamy za 10-13 dni
843.23
This book describes simple to complex ASIC design practical scenarios using Verilog. It builds a s...

Informacje o książce

Język
Angielski
Oprawa
Książka - Twarda
Data wydania
2021
strony
352
EAN
9789813346413
ISBN
9813346418
Enbook ID
33447190
Waga
694
Wymiary
160 x 241 x 24

Pełny opis

This book describes simple to complex ASIC design practical scenarios using Verilog. It builds a story from the basic fundamentals of ASIC designs to advanced RTL design concepts using Verilog. Looking at current trends of miniaturization, the contents provide practical information on the issues in ASIC design and synthesis using Synopsys DC and their solution. The book explains how to write efficient RTL using Verilog and how to improve design performance. It also covers architecture design strategies, multiple clock domain designs, low-power design techniques, DFT, pre-layout STA and the overall ASIC design flow with case studies. The contents of this book will be useful to practicing hardware engineers, students, and hobbyists looking to learn about ASIC design and synthesis.

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