Robotic Exploration and Landmark Determination

Name: Robotic Exploration and Landmark Determination
Brand: Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
SKU: 9783642094651
Price: 433.29 PLN
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Hardware-Efficient Algorithms and FPGA Implementations

Autor: K. Sridharan, Panakala Rajesh Kumar

Język:

Oprawa: Miękka

Wydawca: Springer-Verlag Berlin and Heidelberg GmbH & Co. KG

Dostępność: Dostępna u dostawcy

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This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, nam...

Informacje o książce

Autor

K. Sridharan, Panakala Rajesh Kumar

Język

Angielski

Oprawa

Książka - Miękka

Data wydania

2010

strony

139

EAN

9783642094651

ISBN

3642094651

Enbook ID

01654360

Wydawca

Springer-Verlag Berlin and Heidelberg GmbH & Co. KG

Waga

248

Wymiary

155 x 235 x 8

Pełny opis

This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates.Much of the research effort in mobile robots in the recent past has been on sensing and design of time-efficient algorithms for tasks such as localization, mapping and navigation. Mobile robots typically employ an embedded computer for high level computations. As applications of robots expand, there is a need to investigate architecturally efficient choices for this embedded computing platform. In particular, it is valuable to process data to obtain time, space and energy-efficient solutions for various robotic tasks.§This book presents hardware-efficient algorithms and FPGA implementations for two robotic tasks, namely exploration and landmark determination. The work identifies scenarios for mobile robotics where parallel processing and selective shutdown offered by FPGAs are invaluable. The book proceeds to systematically develop memory-driven VLSI architectures for both the tasks. The architectures are ported to a low-cost FPGA with a fairly small number of system gates. A robot fabricated with this FPGA on-board serves to validate the efficacy of the approach. Numerous experiments with the robot are reported.

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