Delay Fault Testing for VLSI Circuits

Name: Delay Fault Testing for VLSI Circuits
Brand: Springer
SKU: 9780792382959
Price: 641.42 PLN
Availability: InStock

Autor: Angela Krstic, Kwang-Ting (Tim) Cheng

Język:

Oprawa: Twarda

Wydawca: Springer

Dostępność: Dostępna u dostawcy

Wysyłamy za 10-13 dni

641.42 zł

With the ever-increasing speed of integrated circuits, violations of the performance specifications...

Informacje o książce

Autor

Angela Krstic, Kwang-Ting (Tim) Cheng

Język

Angielski

Oprawa

Książka - Twarda

Data wydania

1998

strony

191

EAN

9780792382959

ISBN

0792382951

Enbook ID

01397538

Wydawca

Springer

Waga

1050

Wymiary

155 x 235 x 17

Pełny opis

With the ever-increasing speed of integrated circuits, violations of the performance specifications are becoming a major factor affecting the product quality level. The need for testing timing defects is further expected to grow with the current design trend of moving towards deep submicron devices. After a long period of prevailing belief that high stuck-at fault coverage is sufficient to guarantee high quality of shipped products, the industry is now forced to rethink other types of testing. §Delay testing has been a topic of extensive research both in industry and in academia for more than a decade. As a result, several delay fault models and numerous testing methodologies have been proposed. Delay Fault Testing for VLSI Circuits presents a selection of existing delay testing research results. It combines introductory material with state-of-the-art techniques that address some of the current problems in delay testing. Delay Fault Testing for VLSI Circuits covers some basic topics such as fault modeling and test application schemes for detecting delay defects. It also presents summaries and conclusions of several recent case studies and experiments related to delay testing. A selection of delay testing issues and test techniques such as delay fault simulation, test generation, design for testability and synthesis for testability are also covered. §Delay Fault Testing for VLSI Circuits is intended for use by CAD and test engineers, researchers, tool developers and graduate students. It requires a basic background in digital testing. The book can used as supplementary material for a graduate-level course on VLSI testing.

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