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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Name: Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
Brand: Springer International Publishing AG
SKU: 9783319824857
Price: 428.07 PLN
Availability: InStock

Autor: NUNO LOUREN O

Język:

Oprawa: Miękka

Wydawca: Springer International Publishing AG

Dostępność: Dostępna u dostawcy

Wysyłamy za 5-8 dni

428.07 zł

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizi...

Informacje o książce

Autor

NUNO LOUREN O

Język

Angielski

Oprawa

Książka - Miękka

Data wydania

2018

strony

182

EAN

9783319824857

ISBN

9783319824857

Enbook ID

19737740

Wydawca

Springer International Publishing AG

Waga

454

Wymiary

155 x 235 x 12

Pełny opis

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit's performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

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